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p-dso-14-3, -4, -9, -11 nmosfet schottkydiode c out = 100 f v out = 5 v c bt = 10 nf v in = 14 v TLE6387GV50 rst 678 3,4,5, 10,11,12 9 14 1 13 2 gdrv src cbt fb gnd stby vs r rst1 = 4.7 k ? r load = 5 ? c in2 100 nf c in1 10 f on off r rst2 = 4.7 k ? rst l=47h step-down dc/dc controller for external n-mosfets target datasheet tle 6387 g target datasheet rev. 0.5 1 2001-08-27 c o n - functional description the tle6387 dc-dc switching controllers are used to built up buck (or step down) converter circuits for loads higher 1a with efficiencies higher than 80%. the device combines the regulation loop for a buck converter topology with an output voltage supervision module that generates a reset signal in case of over- or undervoltage at the output of the step-down converter. the special observer-based adaptive current mode control scheme requires neither external compensation in terms of an rc-network nor a current sense resistor for proper operation of the buck circuit. these controllers drive an external n-channel mosfet, allowing design flexibility for different applications by choosing the appropriate switching transistor. the high switching frequency of 400khz type ordering code package description tle 6387 gv50 on request p-dso-14-4 5v version tle 6387 gv60 on request p-dso-14-4 5.8v version features ? input voltage range up to 60v ? fixed output voltages: 5v at version gv50 and 5.8v at version gv60 ? integrated output voltage supervision with over- and undervoltage reset (only at version gv50) ? fixed reset delay time of 21ms (only at version gv50) ? short-circuit protection ? current mode control scheme without current sense resistor ? stable operation even for esr = 0 ? switching frequency of 400khz ? smart feedback wirebreak protection ? overtemperature protection ? wide ambient temperature range from -40c to 125c
tle 6387 g target datasheet rev. 0.5 2 2001-08-27 allow the use of tiny surface-mount inductors. output capacitor requirements are also reduced, minimizing pc board area and system costs. the output voltage is preset to 5.0v ( tle 6387 gv50 ) or 5.8v ( tle 6387 gv60) . input voltages up to 60v and the wide temperature range make the device suitable for all automotive applications in the existing 12v powernet as well as in the future 42v powernet. pin configuration (top view ) 8 9 10 11 12 7 6 5 4 3 2 13 1 14 p-d-so-14-4 gdrv v s gnd gnd gnd rst src cbt gnd gnd gnd fb stby rst tle 6387 gv50 (n.c.) (n.c.) (tle 6387 gv60)
tle 6387 g target datasheet rev. 0.5 3 2001-08-27 pin definitions and functions pin no symbol function 1gdrv gate driver output. connect straight to the gate of n-channel mos. 2v s supply voltage input. battery input, connect a 100nf capacitor to gnd. 3, 4, 5, 10, 11, 12 gnd ground pins. analog signal ground . 6rst (n.c.) reset output. open collector output, connect via a pull up resistor of 4.7k ? to the output of the buck converter. only available at version gv50, at version gv60 this pin is not connected. 7rst (n.c.) inverse reset output. open collector output, connect via a pull up resistor of 4.7k ? to the output of the buck converter. only available at version gv50, at version gv60 this pin is not connected. 8stby inhibit input. an active high signal will disable the device, active low turns it on. 9fb feedback input. connect the output of the buck converter straight to this pin to get the output voltage information. 13 cbt bootstrap capacitor input. connect a ceramic capacitor between the source of the nmos/cathode of the freewheeling diode and this pin to obtain the gateoverdrive in switchmode operation. 14 src source input. connect this pin to the source node of the nmos for overcurrent detection and internal current signal forming
tle 6387 g target datasheet rev. 0.5 4 2001-08-27 1 absolute maximum ratings item parameter symbol limit values unit remarks min. max. supply voltage input 1.1 voltage v s -0.5 65 v ? 1.2 current i s ?? ? 1.3 bootstrap capacitor input 1.4 voltage v cbt -0.5 75 v | v cbt - v src | < 10v 1.5 current i cbt ?? ? 1.6 gate driver output 1.7 voltage v gdrv ? 1 75 v | v gdrv - v src | < 10v 1.8 current i gdrv ?? ? 1.9 source input 1.10 voltage v src ? 1 65 v 1.11 current i src ?? ? reset output 1.12 voltage v rst ? 0.5 20 v 1.13 current i rst ?? ? 1.14 inverse reset output 1.15 voltage v rst ? 0.5 20 v 1.16 current i rst ?? ? 1.17 inhibit input 1.18 voltage v stby ? 0.5 8 v 1.19 current i stby ?? ? 1.20 feedback input 1.21 voltage v fb ? 0.5 20 v 1.22 current i fb ?? ?
tle 6387 g target datasheet rev. 0.5 5 2001-08-27 note: maximum ratings are absolute ratings; exceeding any one of these values may cause irreversible damage to the integrated circuit. esd-protection (human body model; r=1,5k ? ; c=100pf) 1.23 all pins to gnd v hbm ?2 2 kv 1.24 temperatures 1.25 junction temperature t j ? 40 150 c 1.26 storage temperature t stg ? 65 150 c 1 absolute maximum ratings (cont?d) item parameter symbol limit values unit remarks min. max.
tle 6387 g target datasheet rev. 0.5 6 2001-08-27 2 operating range item parameter symbol limit values unit remarks min. max. 2.1 supply voltage range v s 6 60 v version gv50 2.2 supply voltage range v s 7 60 v version gv60 2.3 source voltage range v src ? 1 60 v 2.4 junction temperature t j ? 40 150 c 2.5 thermal resistance 2.6 junction ambient r thj-a 112 k/w 1) pcb heat sink area 0mm 2 2.7 junction ambient r thj-a 92 k/w 1) pcb heat sink area 300mm 2 2.8 junction ambient r thj-a 78 k/w 1) pcb heat sink area 600mm 2 2.9 junction pin r thj-pin4 32 k/w 1) package mounted on pcb 80 x 80 x 1.5 mm 3 ; 35 cu; 5 sn; zero airflow 3 electrical characteristics 7v< v s <36v; - 40c< t j <150c; the electrical characteristics involve the spread of values guaranteed within the supply voltage and junction temperature range given below. all voltages are given with respect to ground; positive current defined flowing into the pin; unless otherwise specified item parameter symbol limit values unit test condition min. typ. max. voltage supply 3.1 supply current into v s i s 1.5 4 6.5 ma v fb = 5 v, v s = 24 v and 55 v v stby = 0 v gdrv open
tle 6387 g target datasheet rev. 0.5 7 2001-08-27 3.2 supply current into v s i s 170 300 a v s = 14 v, 24 v and 55 v v stby = 5 v gate driver 3.3 bootstrap charger, output voltage v cbt ? v src 510v v stby = 0 v c cbt = 10 nf 3.4 gate driver, high level output voltage v gdrv ? v src 510v v stby = 0 v c cbt = 10 nf c gdrv = 1.5 nf 3.5 gate driver, low level output voltage v gdrv ? v src 0.2 v v src =0v v fb =5.5v v stby = 0 v c cbt = 10 nf c gdrv = 1.5 nf 3.6 gate driver, peak charging current i gdrv ? 0.35 agbd 3.7 gate driver, peak discharging current i gdrv 1agbd 3.8 gate driver, gate charge q gdrv 10 nc gbd 3.9 gate driver, rise time t r,gdrv 30 50 ns gbd 3.10 gate driver, fall time t f,gdrv 14 25 ns gbd 3 electrical characteristics (cont?d) 7v< v s <36v; - 40c< t j <150c; the electrical characteristics involve the spread of values guaranteed within the supply voltage and junction temperature range given below. all voltages are given with respect to ground; positive current defined flowing into the pin; unless otherwise specified item parameter symbol limit values unit test condition min. typ. max.
tle 6387 g target datasheet rev. 0.5 8 2001-08-27 3.11 gate driver, source current i src 100 275 400 a v s = v src = 55v v fb =5v v stby =5v 3.12 undervoltage lockout, upper threshold voltage v cbt ? v src 2.5 4.5 v v src = v fb =0v v stby =0v c cbt = 10nf gdrv open 3.13 undervoltage lockout, lower threshold voltage v cbt ? v src 2.0 4.0 v v src = v fb =0 v v stby =0v c cbt =10nf gdrv open 3.14 short-circuit protection, threshold voltage v s ? v src 0.5 0.75 1.00 v version gv50 3.15 short-circuit protection, threshold voltage v s ? v src 1.00 1.25 1.50 v version gv60 3.16 short-circuit protection, switching delay t sc,d 150 250 ns v s =7v v src =5v v cbt - v src =7v v stby =0v v fb =4v gdrv open control loop 3.17 feedback voltage v fb 4.85 5 5.15 v version gv50, see application circuit 3 electrical characteristics (cont?d) 7v< v s <36v; - 40c< t j <150c; the electrical characteristics involve the spread of values guaranteed within the supply voltage and junction temperature range given below. all voltages are given with respect to ground; positive current defined flowing into the pin; unless otherwise specified item parameter symbol limit values unit test condition min. typ. max.
tle 6387 g target datasheet rev. 0.5 9 2001-08-27 3.18 feedback voltage v fb 5.70 6.00 v version gv60, see application circuit 3.19 feedback voltage, line regulation ? v fb 850mv v s step from 6v to 24v (gv50) from 7v to 24v (gv60) and from 50v to 24v, see application circuit 3.20 feedback voltage, load regulation ? v fb 550mv i l step from 0.5a to 1a, see application circuit i l r l 0.5 v 3.21 feedback current i fb 100 125 335 a v fb =5 v v s = 6v (gv50) v s = 7v (gv60) v stby = 0 v 3.22 feedback current i fb 350 470 700 a v fb =5 v v s =4 v or v stby = 5 v 3.23 oscillator frequency f osc 330 390 430 khz 3.24 duty cycle, minimum d2 5.5% 3.25 duty cycle, maximum d95 98% 3 electrical characteristics (cont?d) 7v< v s <36v; - 40c< t j <150c; the electrical characteristics involve the spread of values guaranteed within the supply voltage and junction temperature range given below. all voltages are given with respect to ground; positive current defined flowing into the pin; unless otherwise specified item parameter symbol limit values unit test condition min. typ. max.
tle 6387 g target datasheet rev. 0.5 10 2001-08-27 3.26 lc out -filter, resonant frequency f lc 0.5 2 11 khz 3.27 choking coil, offset voltage i l . r l 0.5 v supervision reset generator available at version gv50 only! 3.28 undervoltage, lower threshold voltage v fb 4.5 4.7 4.8 v v fb decreasing i rst =2ma 3.29 undervoltage, voltage hysteresis ? v fb 40 70 100 mv v fb decreasing i rst =2ma 3.30 undervoltage, switching delay t uv,d 53540 s v fb decreasing i rst =2ma 3.31 overvoltage, upper threshold voltage v fb 5.2 5.4 5.5 v v fb increasing i rst =2ma 3.32 overvoltage, voltage hysteresis ? v fb 50 85 120 mv v fb increasing i rst =2ma 3.33 overvoltage, switching delay t ov,d 53540 s v fb increasing i rst =2ma 3.34 reset, output voltage v rst 0.1 v i rst = 20 a v fb = 5 v 3.35 0.4 v i rst = 2 ma v fb = 5 v 3.36 v rst 0.1 v i rst = 20 a v fb = 6 v 3.37 0.4 v i rst = 2 ma v fb = 6 v 3.38 0.2 v i rst = 0.3 ma v fb = 1 v 3 electrical characteristics (cont?d) 7v< v s <36v; - 40c< t j <150c; the electrical characteristics involve the spread of values guaranteed within the supply voltage and junction temperature range given below. all voltages are given with respect to ground; positive current defined flowing into the pin; unless otherwise specified item parameter symbol limit values unit test condition min. typ. max. f lc 1 2 lc ------------------ - =
tle 6387 g target datasheet rev. 0.5 11 2001-08-27 3.39 reset, output current i rst 2 a v rst = 6 v v fb = 6 v 3.40 i rst 2 a v rst = 6 v v fb = 5 v 3.41 reset, recovery delay t rst 19 21 25 ms v fb decreasing i rst =2ma 3.42 t rst 19 21 25 ms v fb decreasing i rst =2ma standby control 3.43 stand-by, high level threshold voltage v stby 2v v fb =3v 3.44 stand-by, low level threshold voltage 0.8 v v fb =3v 3.45 stand-by, hysteresis ? v stby 0.4 0.6 1.2 v v fb =3v 3.46 stand-by, pull-up current i stby ? 30 ? 16 ? 10 a v stby = 0 v thermal shutdown 3.47 overtemperature, upper threshold t ot 190 c v stby = 0 v v fb = 3 v 3.48 overtemperature, lower threshold t ot 170 c v stby = 0 v v fb = 3 v 3.49 overtemperature, hysteresis ? t ot 20 c v stby = 0 v v fb = 3 v 3 electrical characteristics (cont?d) 7v< v s <36v; - 40c< t j <150c; the electrical characteristics involve the spread of values guaranteed within the supply voltage and junction temperature range given below. all voltages are given with respect to ground; positive current defined flowing into the pin; unless otherwise specified item parameter symbol limit values unit test condition min. typ. max.
tle 6387 g target datasheet rev. 0.5 12 2001-08-27 4 detailed circuit description 4.1 block diagram osc reset logic voltage supply aux. voltage supply c pwm 16 a 2.7v 2.66v 3v cbt gdrv src v s rst fb 5v stby 1.7v 1.1v gnd v s & & i oca cm i ota cc 3v r sq 1.25v c sc c uv c ov 3.05v 3v overtemp. protection c stby i ota ea & slope- comp. internal reference 1 c sw wirebreak detection stand-by control vout
tle 6387 g target datasheet rev. 0.5 13 2001-08-27 4.2 functional description internal power supply the tle 6387 g internal power supply consists of an internal voltage supply, a subsequent auxiliary voltage supply and the internal voltage reference. as long as the supply voltage provided at pin 2 ( v s ) is high enough, the entire controller is supplied from this voltage by means of the internal voltage supply. if the regulated voltage of the internal voltage supply, however, drops below the converter ? s output voltage sensed at pin 9 (fb), the auxiliary voltage supply and the internal voltage reference are immediately cut off the internal voltage supply and are supplied from the converter ? s output voltage, instead. in this way the output voltage supervisor, which drives the reset output, keeps on running even though the supply voltage at pin 2 ( v s ) has dropped down to zero. the same switching operation is performed whenever the controller is set into stand-by, either by external request via pin 8 (stby), by overtemperature protection or by wirebreak detection (cf. ?stand-by management? ). stand-by management the same switching operation as described above (cf. ?internal power supply? ) is also performed, whenever the controller is set into stand-by mode, either by external request, by overtemperature protection or by wirebreak detection. while the latter are failure modes, the external stand-by request is controlled by pin 8 (stby). as long as the voltage at pin 8 exceeds 2 v the controller is disabled. however, if the voltage at pin 8 drops below 0.8 v the controller is enabled. to avoid unintentional start-ups pin 8 is internally pulled-up. in this way the controller is disabled even if this pin is not connected. observer-based adaptive current mode control iin order to achieve a fast and stable control with excellent line and load regulation and with a precisely controlled output voltage, tle 6387 g uses observer-based adaptive current mode control. like conventional current mode control it consists of two control loops. the first loop serves to control the output voltage sensed at pin 9 (fb) by means of error amplifier ota ea . the second loop is used to control the load current. unlike conventional approaches the load current is calculated by oca cm integrating the voltage across the choking coil, i.e. between pin 14 (src) and pin 9 (fb). in this way the current loop can do without an additional resistor, which is usually needed to sense the load current and which reduces the overall efficiency of the dc/dc converter. to achieve a stable duty cycle at values above 50%, the current loop is furthermore equipped with an appropriate slope-compensation. in order to achieve a precise output voltage regardless of the respective load current the voltage loop and the current loop are coupled by ota cc . ota cc serves to compensate the dc voltage offset of the choking coil, which
tle 6387 g target datasheet rev. 0.5 14 2001-08-27 results from its inevitable series resistance and the average load current . in order not to spoil the current mode signal this offset is slowly compensated using the inherent inertia of the voltage loop. please note, since the inputs of ota ea and oca cm are internally connected, it is not possible to increase the output voltage by feeding back only a fraction of the output voltage to pin 9 (fb). in fact , whenever the generated output voltage differs from the voltage sensed at pin 9 (fb), a large dc offset is added to the internal current mode signal, which cannot be compensated by ota cc and which consequently will result in a clampled output voltage. protection circuitry (only avaiable at version gv50) to achieve a safe operation of the controller and its load connected, tle 6387 g is equipped with different protection circuitry. to warn loads supplied of temporary undervoltages or overvoltages the output voltage is continuously supervised for undervoltages or overvoltages. to prevent the undervoltage and overvoltage comparators c uv and c ov from being triggered due to inevitable noise that is superimposed on the voltage sensed at pin 9 (fb), both comparators are equipped with a corresponding hysteresis as well as an input low pass filter. in case an undervoltage or overvoltage has been detected, the reset signals at pin 6 (rst) and pin 7 (rst ) are set according to1. if the undervoltage or overvoltage has passed both signals are reset after 21 ms. a corresponding timing diagram is given in 1 and 2. in order to make sure the output voltage supervisor is working properly down to an output voltage of 1 v regardless of the supply voltage at pin 2 ( v s ), its supply voltage is switched between the internal voltage supply and the converters output voltage if necessary (cf. ?internal power supply? ). to protect the converter and the driven power switch from destruction due to a short- circuited output, the voltage drop across the power switch is checked cycle-by-cycle. if this voltage drop exceeds 1.25 v, the driver is immediately shut off for the remaining part of the respective cycle. as a result, the duty cycle is kept constant at a value as small as possible. in order to prevent the output voltage from high overvoltages, which may be caused by a missing output capacitor or a broken connection between pin 9 (fb) and the output capacitor, tle 6387 g is equipped with a smart wirebreak protection, which shortly checks the status of pin 9 (fb) whenever the controller is turned on. v fb rst rst undervoltage z l overvoltage z l else l z table 1 reset logic truth table i l r l ? ()
tle 6387 g target datasheet rev. 0.5 15 2001-08-27 to prevent the controller from overheating, the chip temperature is continuously checked. if this temperature exceeds 190 c the controller is switched into stand-by mode until the temperature has dropped below 170 c. bootstrap driver tle 6387 g ? s bootstrap driver comprises the bootstrap capacitor charger, an undervoltage lockout and the gate driver. by means of the bootstrap capacitor charger the bootstrap capacitor is quickly charged each duty cycle. charging occurs as long as the gate driver is switched off and the voltage of the bootstrap capacitor does not exceed its maximum value. as soon as the capacitor is charged or the gate driver is switched on, charging is switched off. the gate driver is equipped with a class b push-pull output stage which is actively held high or low respectively to prevent from unintentional switching of the driven transistor, which otherwise may be caused by spurious signals. to control the gate voltage rise and fall times an external resitor can be added between gdrv and the gate of the external transistor. 4.3 functional block description oscillator the oscillator provides the digital clock signals required for minimum and maximum duty cycle limitation, reset delay timing and current mode slope compensation. all of these signals are derived from a saw-tooth ramp running at 400 khz. error amplifier ota ea being part of the voltage control loop the error amplifier ota ea serves to monitor the output voltage sensed at pin 9 (fb) with respect to an internal high precision reference voltage. its output voltage represents the amplified difference of these input voltages. current compensation amplifier ota cc ota cc is used to compensate the dc offset of oca cm . by means of this compensation a large effective open loop gain of the outer voltage control loop is achieved, which ensures an accurate output voltage.
tle 6387 g target datasheet rev. 0.5 16 2001-08-27 current mode amplifier oca cm the current mode signal is provided by the fast current amplifier oca cm . this is done without any shunt resistor by integrating the alternating voltage drop across the choking coil. pwm comparator c pwm by comparison of the compensated current mode signal and the output voltage of ota ea the fast comparator c pwm creates the required duty cycle. standby control comparator c stby an external stand-by request is handled by c stby . as long as pin 8 (stby) is not connected, the voltage at this pin is pulled-up by means of an internal current source and the controller is kept in stand-by mode ( v stby > 2 v). as soon as the voltage at pin 8 (stby) drops below 0.8 v the controller becomes active. this stand-by feature, however, does not control the operation of the reset logic ? s outputs at pins 6 (rst) and 7 (rst ). the reset logic keeps on running as long as v fb > 1 v. overvoltage comparator c ov (version gv50 only) c ov checks the average output voltage at pin 9 ( v fb ) for overvoltages. in order to filter the output voltage ripple as well as transient voltage spikes the overvoltage comparator is equipped with a threshold voltage hysteresis and a low pass filter. if the upper threshold voltage is exceeded, both reset outputs are set. if afterwards the voltage at pin 9 ( v fb ) drops below the lower threshold voltage, both reset outputs are reset as soon as the corresponding reset delay of 21 ms has past. undervoltage comparator c uv (version gv50 only) c uv checks the average output voltage at pin 9 ( v fb ) for undervoltages. in order to filter the output voltage ripple as well as transient voltage spikes the undervoltage comparator is equipped with a threshold voltage hysteresis and a low pass filter. if the voltage at pin 9 ( v fb ) drops below the lower threshold voltage, both reset outputs are set. if afterwards the voltage at pin 9 ( v fb ) increases above the upper threshold voltage, both reset outputs are reset as soon as the corresponding reset delay of 21 ms has past. short-circuit comparator c sc in order to allow for a broad variety of driven transistors a short-circuit condition is detected by c sc as soon as the voltage drop across the respective transistor exceeds 0.75v (gv50) or 1.25v (gv60). to distinguish the large short-circuit voltage drop from the even larger voltage drop that occurs if the driven transistor is switched off, c sc is enabled a fixed delay after the gate of the driven transistor is charged and disabled as soon as the driver is switched off.
tle 6387 g target datasheet rev. 0.5 17 2001-08-27 4.4 reset over- and undervoltage timing diagrams (only at version gv50) figure 1 voltage supervisor overvoltage timing diagram v uv v ov < t ov,d v s v fb rst time t rst 1v z l z l t rst t rst rst
tle 6387 g target datasheet rev. 0.5 18 2001-08-27 figure 2 voltage supervisor undervoltage timing diagram v uv v ov < t uv,d v s v fb rst time t rst 1v z l z l t rst t rst rst
tle 6387 g target datasheet rev. 0.5 19 2001-08-27 5 application information 5.1 general information it is not possible to use the tle 6387 to generate output voltages much higher than 5v by simply adding a voltage divider to the output and feeding back only a fraction of the output voltage to pin 9 (fb). this is due to the ota ea and oca cm being internally conected to each other. in fact, whenever the generated output voltagediffers from the voltage sensed at pin 9 (fb), a large dc-offset is added to the internal current mode signal, which cannot be compensated by ota cc and which consequently will result in a clamped output voltage. the maximum load current which can be supplied is limited either by the power dissipation of the driven transistor, by it?s gate capacitance, by the voltage drop across the esr of the choking coil or by the resonant frequency of the output lc-filter. at short circuit condition (also start up condition) the max. current is limited by the short circuit comparator (see section 4) which turns off the nmos according to the product rdson times load current. so the mosfet and the inductance (max. current rating) have to be chosen appropriate the minimum load current which has to be supplied is basically determined by the maximum input voltage v in and the minimum duty cycle of the tle 6387. if the load supplied is too small, the output voltage may exceed 5v. in order to cover the entire input voltage range a minimum load of 50 ? is recommended.
tle 6387 g target datasheet rev. 0.5 20 2001-08-27 figure 3 typical application circuit TLE6387GV50 figure 4 typical application circuit tle6387gv60 c out = 100 f v out = 5 v c bt = 10 nf v in = 14 v TLE6387GV50 rst 678 3,4,5, 10,11,12 9 14 1 13 2 gdrv src cbt fb gnd stby vs r rst1 = 4.7 k ? r load = 5 ? c in2 100 nf c in1 10 f on off r rst2 = 4.7 k ? rst l1 m1 d1 c out = 100 f v out = 5.8 v c bt = 10 nf v in = 14 v TLE6387GV50 678 3,4,5, 10,11,12 9 14 1 13 2 gdrv src cbt fb gnd stby vs r load = 6 ? c in2 100 nf c in1 10 f on off l1 m1 d1 n.c. n.c.
tle 6387 g target datasheet rev. 0.5 21 2001-08-27 5.2 component recommendation and pcb layout in order to largely avoid electromagnetic interference pin 2 (v s ), v in and the drain of the driven mosfet should be directly connected to c in1 . in a similar manner pin 14 (src), the source of the transistor, the bootstrap capacitor c bt and the inductance l should be connected to the cathode of the freewheeling diode via a conducting area/surface on the pcb to avoid parasitric effects when being connected only through the conducting paths. pin 9 (fb), r rst1 , r rst2 , the other terminal of l and the driven load r load should be directly connected to c out and the gnd-terminals of c in1 , c in2 tle 6387 and the freewheeling diode should be star-connected to the gnd terminal of c out . the line connecting pin 1 (gdrv) and the gate of the driven transistor as well as the wires connecting c bt should be as short as possible. c in1 should be placed as close as possible to the drain of the mosfet and the path connecting pin 2 (v s ) and c in1 should be as short as possible. in order to enhance cooling of the tle 6387 which may be necessary when operating at high ambient temperatures, any of its gnd pins should be connected to a heatsink area. component supplier type remarks l1 epcos b82464-a4473-m 47h, coilcraft do3316p-473 47h, 1.6a, 140m ? do5022p-473 47h, 4.5a, 86m ? do3340p-473 47h, 3.8a, 110m ? m1 infineon bsp296 rdson=0.8 ?, 1.0a d1 motorola mbrd360 schottky, 60v, 3a c in1 various electrolyte or low esr tantalum > 10f, 63v c in2 epcos b37872-k1104-k62 ceramic x7r, 100nf, 100v tdk c3216x7r2a104m ceramic x7r, 100nf, 100v c bt epcos b37941-k0103-k60 ceramic x7r, 10nf, 25v tdk ckcl44x7r1e103m ceramic x7r, 10nf, 25v c out epcos b45194-e3107-+40* low esr tantalum, 100f, 16v epcos b45194-e3476-+40* low esr tantalum, 47f, 16v
tle 6387 g target datasheet rev. 0.5 22 2001-08-27 to handle the increased start up currents it is strongly recommended to use a freewheeling diode which is capable of conducting three times the nominal load current. for the same reason the inductance has to be chosen accordingly to stay out of saturation during start-up.
tle 6387 g target datasheet rev. 0.5 23 2001-08-27 6 package outlines p-dso-14-4 (plastic dual small outline) gps05093 sorts of packing package outlines for tubes, trays etc. are contained in our data book ? package information ? . dimensions in mm
tle 6387 g target datasheet rev. 0.5 24 2001-08-27 published by infineon technologies ag, st.-martin-strasse 53 d-81541 mnchen ? infineon technologies ag2000 all rights reserved. attention please! the information herein is given to describe certain components and shall not be considered as warranted charac- teristics. terms of delivery and rights to technical change reserved. we hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. infineon technologiesis an approved cecc manufacturer. information for further information on technology, delivery terms and conditions and prices please contact your nearest infi- neon technologies office in germany or our infineon technologies representatives worldwide (see address list). warnings due to technical requirements components may contain dangerous substances. for information on the types in question please contact your nearest infineon technologies office. infineon technologies components may only be used in life-support devices or systems with the express written approval of infineon technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

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